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Bias stress instability of LTPS TFTs on flexible substrate with activation annealing temperature
Microelectronics Reliability ( IF 1.6 ) Pub Date : 2020-10-01 , DOI: 10.1016/j.microrel.2020.113940
Soonkon Kim , Hyojung Kim , Kihwan Kim , Pyungho Choi , Byoungdeog Choi

Abstract In this paper, we identified the defect state of p-channel low temperature poly-Si thin film transistors (LTPS TFTs) fabricated on a polyimide (PI) substrate that is distributed differently in the interface and channel areas depending on the activation annealing temperature, as well as observed the effect on the threshold voltage (VT) and reliability. To verify the effect of the process temperature on the performance of the LTPS TFTs, an activation heat treatment was conducted at 400 °C, 370 °C and 340 °C. More defects were distributed in the interface and channel area of LTPS TFTs with low heat treatment temperature, resulting in VT formed at a higher voltage. After the negative bias temperature instability (NBTI) test, the VT shifted in the negative voltage direction and moved −0.13 V, −0.51 V and −0.72 V from LTPS TFTs with high activation annealing temperature. In the hot carrier instability (HCI) test, VT also shifted to the negative direction of −0.19 V, −0.51 V, and −1.07 V. The defects distributed in the interface and channel areas that are not curated or activated due to the low activation annealing temperature caused instability under the bias stress.

中文翻译:

LTPS TFTs 在柔性基板上的偏置应力不稳定性与激活退火温度

摘要 在本文中,我们确定了在聚酰亚胺 (PI) 衬底上制造的 p 沟道低温多晶硅薄膜晶体管 (LTPS TFT) 的缺陷状态,该衬底根据激活退火温度在界面和沟道区域中分布不同。 ,以及观察到对阈值电压 (VT) 和可靠性的影响。为了验证工艺温度对 LTPS TFT 性能的影响,在 400 °C、370 °C 和 340 °C 下进行了活化热处理。更多的缺陷分布在低热处理温度的LTPS TFT的界面和沟道区域,导致在更高的电压下形成VT。在负偏压温度不稳定性 (NBTI) 测试后,VT 向负电压方向移动并移动 -0.13 V、-0.51 V 和 -0。来自具有高激活退火温度的 LTPS TFT 的 72 V。在热载流子不稳定性 (HCI) 测试中,VT 也向负方向移动 -0.19 V、-0.51 V 和 -1.07 V。活化退火温度在偏置应力下引起不稳定。
更新日期:2020-10-01
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