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Deterministic Noise Analysis for Single-Stage Amplifiers by Extension of Indefinite Admittance Matrix
IEEE Open Journal of Circuits and Systems Pub Date : 2020-08-12 , DOI: 10.1109/ojcas.2020.3016017
Vijender Kumar Sharma , Jai Narayan Tripathi , Hitesh Shrimali

This article presents two methods, the block approach indefinite admittance matrix (BA-IAM) and the estimation-by-inspection, to analyse the effects of deterministic noise on single-stage, single-ended amplifiers by extending the indefinite admittance matrix. The proposed methods are used to develop a generalised two-port network analysis for the commonly used amplifier topologies, in the presence of the supply, ground, bulk, and input noise sources. Various illustrative case studies (common-source, common-gate, and push-pull amplifiers) are considered to validate the analytical method of different CMOS technology nodes (180 nm, 110 nm, and 28 nm) and foundries (Lfoundry, UMC, and TSMC). Both the proposed methods are compared with the relevant existing methods in terms of mean percentage error (MPE), and computational complexity. The mathematically derived expressions using two methods show less than 4% MPE when compared with the schematic simulation results, obtained by the SPICE based simulations. Also, the post-layout simulations (PLS) results for all the examples (designed in CMOS 180 nm Lfoundry technology) show excellent matching with schematic simulations. The proposed methods can be further applicable to antennas, complex circuits, digital circuits, etc.

中文翻译:

不确定导纳矩阵的扩展对单级放大器的确定性噪声分析

本文介绍了两种方法,即块法不确定导纳矩阵(BA-IAM)和逐项估计,通过扩展不确定导纳矩阵来分析确定性噪声对单级,单端放大器的影响。所提出的方法用于在存在电源,地线,大容量和输入噪声源的情况下针对常用的放大器拓扑开发通用的两端口网络分析。考虑各种说明性案例研究(共源,共栅和推挽放大器)以验证不同CMOS技术节点(180 nm,110 nm和28 nm)和代工厂(Lfoundry,UMC和台积电)。就平均百分比误差(MPE)和计算复杂度而言,将两种方法与现有的相关方法进行了比较。与通过基于SPICE的模拟获得的示意性模拟结果相比,使用两种方法进行数学计算得出的表达式显示出小于4%的MPE。此外,所有示例(采用CMOS 180 nm Lfoundry技术设计)的布局后仿真(PLS)结果均显示出与原理图仿真的出色匹配。所提出的方法可以进一步应用于天线,复杂电路,数字电路等。
更新日期:2020-09-15
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