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Carrier removal and transport in photonic integrated circuit ready InGaAsP/InP substrate: Electrical and transients of charges evaluation
Materials Science in Semiconductor Processing ( IF 4.1 ) Pub Date : 2021-01-01 , DOI: 10.1016/j.mssp.2020.105384
Khurram Hussain , Ahmed Shuja , Muhammad Ali , Shah Fahad

Abstract InGaAsP based technologies are more favorable due to its unique monolithic integrated nature. For an efficient electro-optical device structure, there is a keen interest to develop active and passive components to suffice the needs of monolithic platform. Thus, carrier's transport and removal regions are carefully fabricated with low optical and electronic signal loss in order to optimize the signal to noise ratio (SNR) to effectively produce monolithic chip. In this specialized study we have provided an insight about the effective multi-implant ion-assisted carrier removal capability of the highly conductive epitaxially grown InGaAsP/InP device matrix as PIC's substrate. For this multi-implant strategy has been adopted with C+ and Ni+ ions implanted separately. Their dosage's along with ion energies are simulated rigorously before the actual implantations. Post implant measurements of Sheet resistance, mobility, drift driven electric fields, current-voltage, Arrhenius based activation energies, charge based transient analysis and detailed investigations of traps have been performed to study the viability of carrier removal scheme for the stable as well as reversible electrical isolation of this photonic integrated circuit's platform.Trap parameters identified as a result of a specialized charge deep level transient spectroscopy provides an insight about the energy levels and possible evaluation of recombination/generation centers for effective photonic activity within the device regions. The optical loss study has been performed to inspect the optical hindrance levels into the said InGaAsP PIC matrix.

中文翻译:

光子集成电路就绪 InGaAsP/InP 衬底中的载流子去除和传输:电荷评估的电气和瞬态

摘要 基于 InGaAsP 的技术因其独特的单片集成特性而更受欢迎。对于高效的电光器件结构,开发有源和无源组件以满足单片平台的需求引起了浓厚的兴趣。因此,载流子的传输和去除区域经过精心制造,具有低光学和电子信号损失,以优化信噪比 (SNR) 以有效生产单片芯片。在这项专门研究中,我们深入了解了作为 PIC 衬底的高导电外延生长 InGaAsP/InP 器件矩阵的有效多注入离子辅助载流子去除能力。对于这种多注入策略,已采用 C+ 和 Ni+ 离子分别注入。他们的剂量' 在实际注入之前严格模拟 s 和离子能量。已经进行了薄层电阻、迁移率、漂移驱动电场、电流-电压、基于阿伦尼乌斯的激活能、基于电荷的瞬态分析和陷阱的详细研究的植入后测量,以研究稳定和可逆的载流子去除方案的可行性该光子集成电路平台的电隔离。由专门的电荷深能级瞬态光谱确定的陷阱参数提供了关于能级的洞察力和对复合/生成中心的可能评估,以实现器件区域内的有效光子活动。已执行光损耗研究以检查进入所述 InGaAsP PIC 矩阵的光阻水平。
更新日期:2021-01-01
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