Data movement, particularly access to the main memory, has been the bottleneck of most computing problems. Ray tracing is no exception. We propose an unconventional solution that combines a ray ordering scheme that minimizes access to the scene data with a large on-chip buffer acting as near-compute storage that is spread over multiple chips. We demonstrate the effectiveness of our approach by introducing Mach-RT ( Ma ny ch ip - R ay T racing), a new hardware architecture for accelerating ray tracing. Extending the concept of dual streaming, we optimize the main memory accesses to a level that allows the same memory system to service multiple processor chips at the same time. While a multiple chip solution might seem to imply increased energy consumption as well, because of the reduced memory traffic we are able to demonstrate, performance increases while maintaining reasonable energy usage compared to academic and commercial architectures. This article extends our previous work E. Vasiou, K. Shkurko, E. Brunvand, and C. Yuksel, “Mach-RT: A many chip architecture for high-performance ray tracing,” in Proc. High-Perform. Graph. Conf. , 2019 with design space exploration of the L3 cache size, more detailed evaluation of energy and memory performance, a discussion of energy delay product, and a brief exploration of boards with 16 chips. We also introduce new treelet enqueueing logic for the predictive scheduler.

中文翻译：

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Mach-RT：用于高性能光线追踪的多芯片架构

数据移动，尤其是对主内存的访问，一直是大多数计算问题的瓶颈。光线追踪也不例外。我们提出了一种非常规的解决方案，该解决方案将最小化对场景数据的访问的光线排序方案与充当分布在多个芯片上的近计算存储的大型片上缓冲区相结合。我们通过引入 Mach-RT（ 许多芯片 -射线T Racing），一种用于加速光线追踪的新硬件架构。扩展双流的概念，我们将主内存访问优化到允许同一内存系统同时服务多个处理器芯片的水平。虽然多芯片解决方案似乎也意味着能耗增加，但由于我们能够证明内存流量减少，与学术和商业架构相比，性能提高，同时保持合理的能耗。本文扩展了我们之前的工作 E. Vasiou、K. Shkurko、E. Brunvand 和 C. Yuksel，“Mach-RT：用于高性能光线追踪的多芯片架构”，位于过程。高性能。图形。会议。, 2019 与 L3 缓存大小的设计空间探索，更详细的能量和内存性能评估，能量延迟积的讨论，以及 16 芯片板的简要探索。我们还为预测调度器引入了新的小树入队逻辑。