In this paper, a low-power optical receiver front-end which consists of a transimpedance amplifier (TIA) and three stages of limiting amplifier (LA) for 2.5 Gb/s applications is proposed in 0.18 µm CMOS technology. The proposed TIA benefits from a modified inverter structure, in which the input resistance is properly reduced due to the use of diode-connected transistors in comparison with conventional inverter circuit. Also, an active inductor is used in parallel with a diode-connected transistor at the output node, which provides a low output resistance, while it resonates with the load capacitance to extend the −3 dB frequency bandwidth. Moreover, three stages of LAs are used to obtain extra gain, in which each LA cell uses active inductor load. However, HSPICE simulations for the proposed TIA circuit show a 42.24 dBΩ transimpedance gain, 1.96 GHz frequency bandwidth, 11.7 pA/√Hz input referred noise, and only 972 µW of power consumption at 1.5 V supply. Also, simulation results for the whole receiver system show a 75.6 dB gain, 1.7 GHz frequency bandwidth, and 6.54 mW of power consumption at 1.5 V supply. Finally, simulation results indicate that the proposed receiver system has good performances to be used as a low-power optical receiver front-end.

本文提出了一种在0.18 µm CMOS技术中提出的低功率光接收机前端，该前端包括一个跨阻放大器（TIA）和三级限幅放大器（LA），用于2.5 Gb / s应用。所提出的TIA得益于改进的逆变器结构，与传统的逆变器电路相比，由于使用了二极管连接的晶体管，可以适当降低输入电阻。同样，有源电感器在输出节点与二极管连接的晶体管并联使用，可提供低输出电阻，同时与负载电容产生谐振，以扩展-3 dB的频率带宽。此外，使用三个阶段的LA来获得额外的增益，其中每个LA单元都使用有源电感负载。然而，针对拟议的TIA电路的HSPICE仿真显示42.24dBΩ的跨阻增益为1。96 GHz频率带宽，11.7 pA /√Hz输入参考噪声，在1.5 V电源下的功耗仅为972 µW。此外，整个接收器系统的仿真结果显示，在1.5 V电源下，增益为75.6 dB，频率带宽为1.7 GHz，功耗为6.54 mW。最后，仿真结果表明，所提出的接收机系统具有良好的性能，可作为低功率光接收机的前端。