The transition in manufacturing from Al(Cu)/W to Cu multilevel on-chip line/via ULSI wiring for high-performance CMOS logic chips was initiated in late 1997 and has since become the exclusive industry-standard. The authors provide a comprehensive review of metal thin-film deposition methods and techniques as they apply to the ULSI of Cu interconnects in advanced logic technology. The authors discuss the basic features of Cu dual-damascene processing with a focus on physical vapor deposition and atomic layer deposition techniques, which have enabled the continued scaling of Cu interconnects over many generations of technology. In addition, the authors discuss recent experimental and simulation data on the extendibility of Cu interconnects to future technology nodes.

中文翻译：

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高纵横比薄膜金属沉积在Cu后端技术中的作用

从高性能的CMOS逻辑芯片的Al（Cu）/ W到Cu多级片上生产线/通过ULSI布线的生产过渡始于1997年底，此后已成为唯一的行业标准。作者对金属薄膜沉积方法和技术进行了全面的综述，因为它们适用于先进逻辑技术中的铜互连的ULSI。作者讨论了铜双大马士革加工的基本特征，重点是物理气相沉积和原子层沉积技术，这些技术已使铜互连在许多代技术中得以持续扩展。此外，作者讨论了有关Cu互连到未来技术节点的可扩展性的最新实验和仿真数据。