As field-programmable gate arrays become prevalent in critical application domains, their power consumption is of high concern. In this paper, we present and evaluate a power monitoring scheme capable of accurately estimating the runtime dynamic power of FPGAs in a fine-grained timescale, in order to support emerging power management techniques. In particular, we describe a novel and specialized ensemble model which can be decomposed into multiple customized decision-tree-based base learners. To aid in model synthesis, a generic computer-aided design flow is proposed to generate samples, select features, tune hyperparameters and train the ensemble estimator. Besides this, a hardware realization of the trained ensemble estimator is presented for on-chip real-time power estimation. In the experiments, we first show that a single decision tree model can achieve prediction error within 4.51% of a commercial gate-level power estimation tool, which is 2.41--6.07x lower than provided by the commonly used linear model. More importantly, we study the extra gains in inference accuracy using the proposed ensemble model. Experimental results reveal that the ensemble monitoring method can further improve the accuracy of power predictions to within a maximum error of 1.90%. Moreover, the lookup table (LUT) overhead of the ensemble monitoring hardware employing up to 64 base learners is within 1.22% of the target FPGA, indicating its light-weight and scalable characteristics.

中文翻译：

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FPGA 动态功率原位监测的集成学习方法

随着现场可编程门阵列在关键应用领域变得普遍，其功耗备受关注。在本文中，我们提出并评估了一种能够在细粒度时间尺度内准确估计 FPGA 运行时动态功耗的电源监控方案，以支持新兴的电源管理技术。特别是，我们描述了一种新颖且专业的集成模型，该模型可以分解为多个定制的基于决策树的基学习器。为了帮助模型合成，提出了一个通用的计算机辅助设计流程来生成样本、选择特征、调整超参数和训练集成估计器。除此之外，还介绍了经过训练的集成估计器的硬件实现，用于片上实时功率估计。在实验中，我们首先表明，单个决策树模型可以实现商业门级功耗估计工具的 4.51% 以内的预测误差，比常用的线性模型提供的预测误差低 2.41--6.07 倍。更重要的是，我们使用所提出的集成模型研究了推理精度的额外收益。实验结果表明，集合监测方法可以进一步提高功率预测的准确度，最大误差在1.90%以内。此外，使用多达 64 个基学习器的集成监控硬件的查找表 (LUT) 开销在目标 FPGA 的 1.22% 以内，表明其轻量级和可扩展的特性。更重要的是，我们使用所提出的集成模型研究了推理精度的额外收益。实验结果表明，集合监测方法可以进一步提高功率预测的准确度，最大误差在1.90%以内。此外，使用多达 64 个基学习器的集成监控硬件的查找表 (LUT) 开销在目标 FPGA 的 1.22% 以内，表明其轻量级和可扩展的特性。更重要的是，我们使用所提出的集成模型研究了推理精度的额外收益。实验结果表明，集合监测方法可以进一步提高功率预测的准确度，最大误差在1.90%以内。此外，使用多达 64 个基学习器的集成监控硬件的查找表 (LUT) 开销在目标 FPGA 的 1.22% 以内，表明其轻量级和可扩展的特性。