In this paper, loss due to staggered-via in SIW (Substrate Integrated Waveguide) is analyzed with the help of S-parameter responses and field diagrams. It is observed that staggered-via improves the response of an SIW structure, with higher via pitch (w) to via diameter (d) ratio (w/d), but the loss increases drastically at certain discrete frequencies for which $\mathit{\lambda }/2^{\mathit{n}}$ equals to w, where λ is the guided wavelength corresponding to the frequency and n is any integer value excluding zero. This study will be helpful in choosing between the use of single row of vias or staggered-vias as a sidewall, while designing SIWs at higher frequencies, where it is difficult to use conventional w/d ratio values.

在本文中，借助 S 参数响应和场图分析了 SIW（基板集成波导）中交错过孔引起的损耗。据观察，交错通孔改善了 SIW 结构的响应，通孔节距 ( w ) 与通孔直径 ( d ) 之比 ( w / d ) 更高，但在某些离散频率下损耗急剧增加$\mathit{\lambda }/{\mathrm{2个}}^{\mathit{n}}$等于w，其中λ是对应于频率的导波波长，n是除零以外的任何整数值。这项研究将有助于在使用单排通孔或交错通孔作为侧壁之间进行选择，同时在更高频率下设计 SIW，而在这些频率下很难使用传统的 w / d比值。