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Methodology and comparative design of an efficient 4-bit encoder with bubble error corrector for 1-GSPS flash type ADC
IET Circuits, Devices & Systems ( IF 1.3 ) Pub Date : 2020-08-25 , DOI: 10.1049/iet-cds.2019.0499
Sarfraz Hussain 1 , Rajesh Kumar 1 , Gaurav Trivedi 2
Affiliation  

The design of a 4-bit encoder with a bubble error correction of first order is described in this study. Since encoder restricts speed of the flash analogue-to-digital converter (ADC), therefore, an improved and faster encoder is an essential requirement to push its limits. Encoder is divided into two parts: one-hot code generator [or bubble error corrector (BEC)] and binary encoder. Binary encoder proposed in this study is the modified Fat-Tree encoder of types I and II. Three types of BECs which have been compared in this study are OR gate based, NAND gate based and the proposed BEC. The proposed BEC consumes less power and provides better speed as compared to NAND based and OR gate based BECs. It can be further employed for higher order bubble correction as well. The proposed BEC consumes dynamic power of 87.071 μW and leakage power of 18.3563 pW exhibiting the delay of 38.3 ps with 1.8 V supply voltage and 1 GHz clock frequency. It has a power-delay product of 3.335 fJ, energy-delay product of 127.7305 Js and an intrinsic area of 4.753 mm 2 .

中文翻译:

具有1-GSPS闪存型ADC的带气泡误差校正器的高效4位编码器的方法和比较设计

在这项研究中描述了具有一阶气泡误差校正的4位编码器的设计。由于编码器限制了闪存模数转换器(ADC)的速度,因此,改进和更快的编码器是推动其极限的基本要求。编码器分为两部分:一站式代码生成器[或气泡误差校正器(BEC)]和二进制编码器。本研究中提出的二进制编码器是类型I和II的改进的Fat-Tree编码器。在本研究中已比较的三种类型的BEC是基于OR门,基于NAND门和拟议的BEC。与基于NAND和基于OR门的BEC相比,拟议的BEC消耗更少的功率并提供更好的速度。它也可以进一步用于高阶气泡校正。建议的BEC消耗的动态功率为87.071μW,泄漏功率为18。3563 pW在1.8 V电源电压和1 GHz时钟频率下表现出38.3 ps的延迟。它的功率延迟乘积为3.335 fJ,能量延迟乘积为127.7305 Js,本征面积为4.753 mm 2
更新日期:2020-08-28
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