In this study, a continuous-time delta-sigma modulator (CTDSM) is developed using a Gm-C based noise-shaping quantiser (Gm-C-NSQ) with an improved dynamic element matching (i-DEM) algorithm. Here, a Gm-C integrator is used to develop NSQ, since it increases the effectiveness of the proposed modulator in terms of power consumption and die area. This Gm-C-NSQ uses only three dynamic latches to provide efficient quantisation level and to increase the order of noise shaping. Moreover, an i-DEM algorithm is utilised to reduce the non-linearities of the quantiser and mismatching error of the digital-to-analogue converters presented in the feedback structure of the modulator. Here, an 180 nm CMOS technology is used to design the proposed modulator and it functions at 2.6 MHz sampling frequency. Simulation results show that the proposed modulator can achieve a peak spurious-free dynamic range (SFDR) of 93.67 dB and a peak signal-to-noise ratio of 87.38 dB for 20 kHz signal bandwidth. Furthermore, the proposed modulator consumes 0.0863 mW power when 1.2 V supply voltage is applied.

中文翻译：

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基于GM-C量化器和改进的动态元素匹配的高效CTDSM

在这项研究中，使用具有改进的动态元素匹配（i-DEM）算法的基于Gm-C的噪声整形量化器（Gm-C-NSQ），开发了连续时间delta-sigma调制器（CTDSM）。在这里，Gm-C积分器用于开发NSQ，因为它在功耗和芯片面积方面提高了所提出的调制器的效率。该Gm-C-NSQ仅使用三个动态锁存器来提供有效的量化级别并增加噪声整形的顺序。此外，i-DEM算法用于减少量化器的非线性和调制器反馈结构中出现的数模转换器的失配误差。在这里，使用180 nm CMOS技术来设计所提出的调制器，并且其工作频率为2.6 MHz。仿真结果表明，对于20 kHz信号带宽，该调制器可以实现93.67 dB的无杂散动态范围峰值（SFDR）和87.38 dB的峰均信噪比。此外，当施加1.2 V电源电压时，建议的调制器消耗0.0863 mW的功率。