This brief presents an efficient unified hardware for up-to-date authenticated encryptions with associated data (AEADs). Although some major AEADs share several fundamental components (e.g., advanced encryption standard (AES), block chaining, and XOR-Encryption-XOR (XEX) scheme), each AEAD is equipped with a unique mode of operation and/or sub-functions, which makes it difficult to integrate various AEADs in a hardware efficiently. The proposed hardware in this brief efficiently unifies the fundamental components to perform a set of AEADs with minimal area and power overheads. The proposed configurable datapath is adapted to a set of peripheral operations (e.g., block chaining and XEX), dictated by the given AEAD algorithm. In this brief, we also demonstrate the validity of the proposed hardware through an experimental design adapted to four AES-based AEADs. Consequently, we confirm that the proposed hardware can perform the four AEADs with quite smaller area than the sum of the each dedicated AEAD hardware, comparable throughput and power consumption. In addition, we confirmed that the proposed hardware is superior to software implementation on general-purpose processor in terms of both throughput and power consumption.

中文翻译：

---

用于基于 AES 的高吞吐量认证加密的统一硬件

本简介介绍了一种高效的统一硬件，用于使用相关数据 (AEAD) 进行最新的经过身份验证的加密。尽管一些主要的 AEAD 共享几个基本组件（例如，高级加密标准 (AES)、块链和 XOR-Encryption-XOR (XEX) 方案），但每个 AEAD 都配备了独特的操作模式和/或子功能，这使得很难将各种 AEAD 有效地集成到硬件中。本简介中建议的硬件有效地统一了基本组件，以最小的面积和功率开销执行一组 AEAD。建议的可配置数据路径适用于由给定 AEAD 算法规定的一组外围操作（例如，块链接和 XEX）。在这篇简短的文章中，我们还通过适用于四个基于 AES 的 AEAD 的实验设计证明了所提议硬件的有效性。因此，我们确认所提出的硬件可以执行四个 AEAD，其面积比每个专用 AEAD 硬件的总和小得多，吞吐量和功耗相当。此外，我们确认所提出的硬件在吞吐量和功耗方面都优于通用处理器上的软件实现。