This letter proposes a fully integrated step-down switched-capacitor (SC) DC-DC converter using 0.18- $\mu \text{m}$ CMOS technology for system-on-chip applications. The proposed step-down switched-capacitor DC-DC converter used two control mechanisms: the switch array modulation technique to regulate the output voltage and the voltage ripple modulation technique to adjust the output voltage ripple of the converter as the loading current varied. As a result, the proposed converter could generate a regulated output voltage with low voltage ripple. The converter core performed at conversion ratios of 1/3 and 1/2 under an input voltage of 1.8 V. The measurement results on 180-nm technology showed that the proposed fully integrated step-down switched-capacitor DC-DC converter could achieve a peak power conversion efficiency of 74.1% and maintain power conversion efficiency at levels over 70% within loading ranges between 1.4 and 5 mA. The output voltage ripple was controlled at levels under 63.4 mV within a loading current ranging between 0.1 and 5 mA.

中文翻译：

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具有双输出调节机制的全集成降压开关电容器 DC-DC 转换器

这封信提出了一种完全集成的降压开关电容器 (SC) DC-DC 转换器，该转换器使用 0.18-$\mu\text{m}$ CMOS 技术用于片上系统应用。所提出的降压型开关电容 DC-DC 转换器使用两种控制机制：开关阵列调制技术用于调节输出电压，电压纹波调制技术用于在负载电流变化时调节转换器的输出电压纹波。因此，所提出的转换器可以产生具有低电压纹波的稳定输出电压。转换器内核在 1.8 V 输入电压下以 1/3 和 1/2 的转换比执行。 180-nm 技术的测量结果表明，所提出的全集成降压开关电容器 DC-DC 转换器可以实现峰值功率转换效率为 74。1% 并在 1.4 至 5 mA 的负载范围内将电源转换效率保持在 70% 以上的水平。在 0.1 到 5 mA 的负载电流范围内，输出电压纹波被控制在 63.4 mV 以下的水平。