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Design of Downlink Synchronization for Millimeter Wave Cellular System Based on Multipath Division Multiple Access
IEEE Transactions on Circuits and Systems I: Regular Papers ( IF 5.1 ) Pub Date : 2020-09-01 , DOI: 10.1109/tcsi.2020.2989467 Kang-Lun Chiu , Pai-Hsiang Shen , Bing-Ru Lin , Wei-Han Hsiao , Shyh-Jye Jerry Jou , Chia-Chi Huang
IEEE Transactions on Circuits and Systems I: Regular Papers ( IF 5.1 ) Pub Date : 2020-09-01 , DOI: 10.1109/tcsi.2020.2989467 Kang-Lun Chiu , Pai-Hsiang Shen , Bing-Ru Lin , Wei-Han Hsiao , Shyh-Jye Jerry Jou , Chia-Chi Huang
This work focuses on the design of downlink receiver for future generation cellular systems. In the multipath division multiple access (MDMA) system, the initial synchronization process includes timing and carrier frequency synchronization as well as home cell search. For the proposed system, the user data is transmitted in time domain and the cell search is based on control signals transmitted in frequency domain simultaneously. Firstly, this paper presents a novel architecture for the joint detection and estimation of both the coarse symbol boundary and the fractional carrier frequency offset based on cyclic prefix in time domain. Secondly, a robust integer carrier frequency offset detection is performed with the primary control tone in frequency domain. Moreover, the position of the secondary control tones is used to obtain the cell ID. Finally, the preamble sequence carried by the secondary control tones is used to detect frame header through differential detection. The simulation results show the proposed synchronization algorithms can achieve detection failure rate less than 1% and the normalized residual carrier frequency offset is less than 5% under the interference of user data. Furthermore, a hardware design targeted at 200 Mbps per-user data rate is realized with memory arbiter to share memory.
中文翻译:
基于多径分多址的毫米波蜂窝系统下行同步设计
这项工作的重点是为下一代蜂窝系统设计下行链路接收器。在多径分多址(MDMA)系统中,初始同步过程包括定时和载频同步以及家庭小区搜索。对于所提出的系统,用户数据在时域传输,小区搜索基于同时在频域传输的控制信号。首先,本文提出了一种新的架构,用于基于时域循环前缀的粗符号边界和分数载波频率偏移的联合检测和估计。其次,利用频域中的主要控制音来执行稳健的整数载波频率偏移检测。此外,辅助控制音的位置用于获得小区ID。最后,辅控制音携带的前导序列用于差分检测检测帧头。仿真结果表明,所提出的同步算法在用户数据干扰下能够实现小于1%的检测失败率和小于5%的归一化残余载波频偏。此外,针对每用户 200 Mbps 数据速率的硬件设计通过内存仲裁器实现共享内存。
更新日期:2020-09-01
中文翻译:
基于多径分多址的毫米波蜂窝系统下行同步设计
这项工作的重点是为下一代蜂窝系统设计下行链路接收器。在多径分多址(MDMA)系统中,初始同步过程包括定时和载频同步以及家庭小区搜索。对于所提出的系统,用户数据在时域传输,小区搜索基于同时在频域传输的控制信号。首先,本文提出了一种新的架构,用于基于时域循环前缀的粗符号边界和分数载波频率偏移的联合检测和估计。其次,利用频域中的主要控制音来执行稳健的整数载波频率偏移检测。此外,辅助控制音的位置用于获得小区ID。最后,辅控制音携带的前导序列用于差分检测检测帧头。仿真结果表明,所提出的同步算法在用户数据干扰下能够实现小于1%的检测失败率和小于5%的归一化残余载波频偏。此外,针对每用户 200 Mbps 数据速率的硬件设计通过内存仲裁器实现共享内存。