Scan chain is an architectural solution to facilitate in-field tests and debugging of digital chips, however, it is also known as a source of security problems, e.g. scan-based attacks in the chips. The authors conduct a comprehensive gate-level security analysis on crypto-chips, which are equipped with a scan chain, and then propose a set of protection mechanisms to immune vulnerable nets of the chips against scan-based attacks. After extracting the set of most vulnerable nets, they perform net pruning algorithms on them, and gate-level protection mechanisms to block the information leaking from the nets during test mode. The protection mechanisms employ net masking, net flipping, and net shuffling based on the specifications of every net, i.e. gate-type driving the net, fan-out of the net, and net's logical depth. Their evaluations on the hardware-implemented advanced encryption standard (AES) and data encryption standard (DES) encryption algorithms show 100% for all types of scan-based attack tolerance, while the area overhead is at most 1.5%, 6.1% for AES and DES crypto-chip, respectively. As they find the smallest set of nets that have a high contribution to the scan attack, the test coverage loss of their protection mechanism is evaluated to be <;0.8%.

中文翻译：

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基于扫描的攻击容忍度和可测试性损失最小：门级方法

扫描链是一种体系结构解决方案，可促进数字芯片的现场测试和调试，但是，它也被称为安全问题的源头，例如芯片中基于扫描的攻击。作者对配有扫描链的加密芯片进行了全面的门级安全性分析，然后提出了一套保护机制，以保护芯片的易受攻击的网络免受基于扫描的攻击。在提取了最易受攻击的网络集之后，他们对它们执行网络修剪算法，并使用门级保护机制来阻止在测试模式下信息从网络中泄漏出来。保护机制根据每个网络的规格采用网络掩蔽，网络翻转和网络改组，即门型驱动网络，网络扇出和网络的逻辑深度。他们对硬件实现的高级加密标准（AES）和数据加密标准（DES）加密算法的评估显示，所有类型的基于扫描的攻击耐受性均为100％，而区域开销最大为1.5％，AES和6.1％。分别为DES加密芯片。当他们找到对扫描攻击有高贡献的最小网络集时，其保护机制的测试覆盖率损失估计为<0.8％。