A new method is discussed for the systematic synthesis, design, and performance optimization of single-ended varactor-based 2:1 parametric frequency dividers (PFDs) exhibiting an ultralow-power threshold ( ${P_{\mathrm{ th}}}$ ). For the first time, it is analytically shown that the ${P_{\mathrm{ th}}}$ -value exhibited by any PFD can be expressed as an explicit closed-form function of the different impedances forming its network. Such a unique and unexplored property permits reliance on linear models, during PFD design and performance optimization. The validity of our analytical model has been verified, in a commercial circuit simulator, through the time- and frequency-domain algorithms. To demonstrate the effectiveness of our new synthesis approach, we also report on a lumped prototype of a 200:100 MHz PFD, realized on a printed circuit board (PCB). Although inductors with quality factors lower than 50 were used, the PFD prototype exhibits a ${P_{\mathrm{ th}}}$ -value lower than −15 dBm. Such a ${P_{\mathrm{ th}}}$ -value is the lowest one ever reported for passive varactor-based PFDs operating in the same frequency range.

中文翻译：

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超低阈值 2:1 参数分频器的系统综合与设计

讨论了一种用于系统综合、设计和优化基于单端变容二极管的 2:1 参数分频器 (PFD) 的新方法，该分频器具有超低功耗阈值。 ${P_{\mathrm{ th}}}$ ）。首次分析表明， ${P_{\mathrm{ th}}}$ 任何 PFD 显示的值都可以表示为形成其网络的不同阻抗的显式闭合函数。这种独特且未开发的特性允许在 PFD 设计和性能优化期间依赖线性模型。我们的分析模型的有效性已在商业电路模拟器中通过时域和频域算法得到验证。为了证明我们新综合方法的有效性，我们还报告了在印刷电路板 (PCB) 上实现的 200:100 MHz PFD 的集总原型。虽然使用了品质因数低于 50 的电感器，但 PFD 原型展示了 ${P_{\mathrm{ th}}}$ -值低于 -15 dBm。这样一个 ${P_{\mathrm{ th}}}$ -value 是在相同频率范围内运行的基于无源变容二极管的 PFD 所报告的最低值。