This paper presents the design and testing of a low-noise programmable voltage source. Such a piece of instrumentation is often required as part of the measurement setup needed to test electronic devices without introducing noise from the power supply (such as photodetectors, resistors or transistors). Although its construction is based on known configurations, here the discussion is focused on the characterization and the minimization of the output noise, especially at very low frequencies. The design relies on a digital-to-analog converter, proper lowpass filters, and a low-noise Junction Field-Effect Transistors (JFET) based voltage follower. Because of the very low level of output noise, in some cases we had to resort to cross-correlation in order to reduce the background noise of the amplifiers used for the characterization of the programmable source. Indeed, when two paralleled IF9030 JFETs are used in the voltage follower, the output noise can be as low as 3 nV/√Hz, 0.6 nV/√Hz and 0.4 nV/√Hz at 1 Hz, 10 Hz and 100 Hz, respectively. The output voltage drift was also characterized and a stability of ±25 µV over 3 h was obtained. In order to better appreciate the performance of the low-noise voltage source that we have designed, its noise performances were compared with those of a set-up based on one of the best low-noise solid-state voltage regulators available on the market. Actual measurements of the current noise in a type-II superlattice photodetector are reported in which the programmable source was used to provide the voltage bias to the device.

中文翻译：

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低噪声可编程电压源

本文介绍了一种低噪声可编程电压源的设计和测试。通常，在不引入电源噪声（例如光电检测器，电阻器或晶体管）的情况下，将这种仪器作为测试电子设备所需的测量设置的一部分。尽管其构造基于已知的配置，但此处的讨论重点在于输出噪声的特性和最小化，尤其是在非常低的频率下。该设计依赖于数模转换器，适当的低通滤波器和基于低噪声结型场效应晶体管（JFET）的电压跟随器。由于输出噪声非常低，在某些情况下，我们必须求助于互相关，以减少用于表征可编程信号源的放大器的背景噪声。实际上，当在电压跟随器中使用两个并联的IF9030 JFET时，在1 Hz，10 Hz和100 Hz时，输出噪声分别可低至3 nV /√Hz，0.6 nV /√Hz和0.4 nV /√Hz。 。还对输出电压漂移进行了表征，并在3小时内获得了±25 µV的稳定性。为了更好地了解我们设计的低噪声电压源的性能，将其噪声性能与基于市场上最好的低噪声固态稳压器之一的装置的噪声性能进行了比较。