In this paper, three eSTREAM Portfolio 2 ciphers: Grain v1, Mickey 2.0 and Trivium, and two Grain-like stream ciphers: Lizard and Plantlet are implemented in three versions aimed at different hardware application purposes. The hardware platform adopts Xilinx’s Spartan7 serial, and the simulations, syntheses and implementations are conducted in Vivado using the Verilog hardware design language. These implementations are compared with each other and those presented in existing literature in terms of performance metrics including: throughput, area consumption and throughput-area ratio. The basic version of Trivium achieves the highest frequency reaching a maximum of 416 Mbps and the serial version consumes the smallest area of 13 slices. In the parallel version, the maximum throughput-area ratio is 165.5 Mbps/Slice achieved by Trivium. At the same time, the basic version of the Mickey 2.0 algorithm achieved the second highest frequency of 384 Mbps, and the serial version of the Grain v1 algorithm achieved the second smallest area with 26 slices.

在本文中，针对不同的硬件应用目的，在三种版本中实现了三种eSTREAM Portfolio 2密码：Grain v1，Mickey 2.0和Trivium，以及两种类似Grain的流密码：Lizard和Plantlet。硬件平台采用Xilinx的Spartan7序列，并且使用Verilog硬件设计语言在Vivado中进行仿真，综合和实现。将这些实现方式相互比较，并根据性能指标对现有文献中提供的实现方式进行比较，包括：吞吐量，面积消耗和吞吐量-面积比。Trivium的基本版本可达到最高频率，最高可达416 Mbps，而串行版本则占用13个切片的最小区域。在并行版本中，Trivium实现的最大吞吐面积比为165.5 Mbps / Slice。