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Time-domain writing architecture for multilevel RRAM cells resilient to temperature and process variations
Integration ( IF 1.9 ) Pub Date : 2020-08-01 , DOI: 10.1016/j.vlsi.2020.07.001
Amadeo de Gracia Herranz , Marisa Lopez-Vallejo

The high potential of memristors as multilevel resistance devices is undermined by their highly non-linear behaviour and a strong dependency on different sources of variability (process, voltage, temperature…). Temperature fluctuations are specially harmful because small thermal variations may significantly modify the operation point of the device. For these reasons the circuitry required to accurately read or write multilevel devices is complex and area demanding, especially if multi-level storage is considered. This work addresses the problem of accurately writing a given resistance value in a memristive cell by using a time-domain architecture found on variable pulses. Temperature resiliency is achieved after performing an in depth analysis of the definition of the resistance levels in the presence of thermal variations. Furthermore, a calibration procedure has been conceived to make the writing circuitry resilient to device to device variations. Experimental results show that the proposed approach is valid for a wide temperature range.



中文翻译:

多级RRAM单元的时域写入架构可抵抗温度和工艺变化

忆阻器作为多级电阻器件的潜力很大,因为它们的高度非线性行为以及对不同可变性源(过程,电压,温度等)的强烈依赖而削弱了这种性能。温度波动特别有害,因为小的热变化可能会显着改变设备的工作点。由于这些原因,准确读取或写入多级设备所需的电路复杂且面积要求高,尤其是在考虑多级存储的情况下。这项工作解决了通过使用可变脉冲上发现的时域架构在忆阻单元中准确写入给定电阻值的问题。在存在热变化的情况下,对电阻级别的定义进行深入分析后,才能获得温度弹性。此外,已经设想了一种校准程序,以使写入电路对器件之间的变化具有弹性。实验结果表明,该方法适用于较宽的温度范围。

更新日期:2020-08-01
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