Stochastic computing (SC) in recent years has been defined as a digital computation approach that operates on streams of random bits that represent probability values. SC can perform complex tasks with much smaller hardware footprints compared with conventional binary methods, but previous methods on SC circuits operated on serial bit streams, which leads to high-latency implementations. This article presents a significant improvement over previous work; it provides a deterministic parallel bit shuffling network that can use a simple deterministic thermometer encoding of data, resulting in zero random fluctuation and high accuracy, yet keeping the output bit-stream length constant. We use core “stochastic” logic circuits that do not employ constant coefficients, making them significantly smaller than traditional stochastic logic that use a significant amount of resources to generate such coefficients. Our experiments show that compared with previous SC methods, our method has up to $3\times $ smaller mean absolute error, and better area $\times $ delay and power efficiency. Compared with conventional binary methods, our method is better in terms of area $\times $ delay at 8-bit resolution. It shows better power efficiency ( $40\times $ , $18\times $ , and $8\times $ Gops/W at 8-, 10-, and 12-bit resolutions) compared with conventional binary.

中文翻译：

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并行实现随机电路的确定性洗牌网络

近年来，随机计算 (SC) 被定义为一种数字计算方法，它对表示概率值的随机位流进行操作。与传统的二进制方法相比，SC 可以用更小的硬件占用空间执行复杂的任务，但以前的 SC 电路方法在串行比特流上运行，这导致高延迟实现。这篇文章比以前的工作有了显着的改进；它提供了一个确定性并行比特混洗网络，可以使用简单的确定性温度计数据编码，从而实现零随机波动和高精度，同时保持输出比特流长度恒定。我们使用不使用常数系数的核心“随机”逻辑电路，使它们比使用大量资源来生成此类系数的传统随机逻辑要小得多。我们的实验表明，与以前的 SC 方法相比，我们的方法高达 $3\times $ 更小的平均绝对误差，更好的面积 $\times $ 延迟和电源效率。与传统的二元方法相比，我们的方法在面积方面更好 $\times $ 8 位分辨率的延迟。它显示出更好的电源效率（ $40\次 $ , $18\times $ ， 和 $8\times $ Gops/W 在 8 位、10 位和 12 位分辨率下）与传统二进制相比。