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Design of a Low Offset, Low Noise Amplifier for Neural Recording Applications
Journal of Scientific & Industrial Research ( IF 0.6 ) Pub Date : 2020-07-09
N M Laskar, S Nath, K Guha, P K Paul, K L Baishnab

The design of a capacitive feedback based neural recording amplifier is presented. The prime design requirements in case of neural amplifiers includes low noise, high gain, high CMRR, low power, low area and low offset voltage. However, there is an inherent trade-off between noise-power and area-offset in the design process which needs to be addressed. A Recycling Folded Cascode based Operational Transconductance Amplifier (RFC-OTA) topology is employed to realize the amplifier as it offers better gain and offset voltage as compared to other topologies. The sizing of the transistors has been done with the primary objective of low random offset voltage while meeting other design criteria within the specified range subject to all inherent trade-offs. Simulations have been done in Cadence Virtuoso using SCL 180 nm technology and comparative analysis with other reported designs reveals that the proposed RFC-OTA based neural amplifier design achieves a low random offset voltage of 1.4 mV with a low input noise of 1.38 µV as compared to most of the reported design.

中文翻译:

用于神经记录应用的低失调,低噪声放大器的设计

提出了基于电容反馈的神经记录放大器的设计。神经放大器的主要设计要求包括低噪声,高增益,高CMRR,低功耗,小面积和低失调电压。但是,在设计过程中,噪声功率和面积偏移之间存在固有的权衡,需要加以解决。由于采用了可折叠的基于Cascode的可重复操作跨导放大器(RFC-OTA)拓扑结构,因此与其他拓扑相比,它提供了更好的增益和失调电压。晶体管的尺寸确定主要是为了实现低随机偏移电压,同时满足所有固有折衷的规定范围内的其他设计标准。
更新日期:2020-07-28
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