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Quick Design of a Superjunction Considering Charge Imbalance Due to Process Variations
IEEE Transactions on Electron Devices ( IF 3.1 ) Pub Date : 2020-08-01 , DOI: 10.1109/ted.2020.2998443
K. Akshay , Shreepad Karmalkar

The breakdown voltage, ${V}_{{\text {BR}}}$ , of a superjunction whose pillar parameters, namely doping, length, and width, are optimized to yield the least specific ON-resistance, ${R}_{{\text {ONSP}}}$ , for the specified ${V}_{{\text {BR}}}$ , falls drastically for even small charge imbalances. Hence, a structure fabricated with these target parameter values often has a ${V} _{{\text {BR}}}$ much lower than specified due to the charge imbalance caused by random process variations. We give an analytical solution for alternate target parameter values which yield the specified ${V}_{{\text {BR}}}$ in spite of process variations, with minimum sacrifice in ${R} _{{\text {ONSP}}}$ . The solution is obtained by the method of Lagrange multipliers and a simple equation for the breakdown field versus charge imbalance. It is validated by TCAD simulation. It can either be approximated to a closed-form or can yield the target parameter values accurately with just a few iterations. Apart from eliminating the tedious iterations of prior design methods, our solution provides two new insights: when compared with an optimum balanced device, a device optimized considering typical charge imbalance has significantly lower pillar doping but almost the same pillar length and width; the breakdown field of a balanced device is a power law function of the pillar length alone. Although illustrated for 4H-SiC structures with ${V}_{{\text {BR,target}}}$ of 1–10 kV, our solution should work for any semiconductor after material specific changes.

中文翻译:

考虑到工艺变化引起的电荷不平衡的超级结的快速设计

击穿电压, ${V}_{{\text {BR}}}$ ,其支柱参数(即掺杂、长度和宽度)经过优化以产生最小特定导通电阻的超级结, ${R}_{{\text {ONSP}}}$ ,对于指定的 ${V}_{{\text {BR}}}$ , 即使很小的电荷不平衡也会急剧下降。因此,用这些目标参数值制造的结构通常具有 ${V} _{{\text {BR}}}$ 由于随机过程变化引起的电荷不平衡,远低于规定值。我们给出了一个替代目标参数值的解析解,它产生了指定的 ${V}_{{\text {BR}}}$ 尽管有工艺变化,以最小的牺牲 ${R} _{{\text {ONSP}}}$ . 该解是通过拉格朗日乘法器的方法和击穿场与电荷不平衡的简单方程获得的。它通过TCAD仿真验证。它可以近似为封闭形式,也可以通过几次迭代准确地产生目标参数值。除了消除先前设计方法的繁琐重复之外,我们的解决方案提供了两个新见解:与最佳平衡器件相比,考虑到典型电荷不平衡而优化的器件具有明显较低的柱掺杂但几乎相同的柱长和宽度;平衡设备的击穿场仅是支柱长度的幂律函数。虽然说明了 4H-SiC 结构 ${V}_{{\text {BR,target}}}$ 1-10 kV,我们的解决方案应该适用于材料特定变化后的任何半导体。
更新日期:2020-08-01
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