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Wafer-Scale Si-GaN Monolithic Integrated E-Mode Cascode FET Realized by Transfer Printing and Self-Aligned Etching Technology
IEEE Transactions on Electron Devices ( IF 3.1 ) Pub Date : 2020-08-01 , DOI: 10.1109/ted.2020.3001083
Jiaqi Zhang , Weihang Zhang , Yichang Wu , Yachao Zhang , Yue Peng , Zhaoqing Feng , Dazheng Chen , Shenglei Zhao , Jincheng Zhang , Chunfu Zhang , Yue Hao

In this article, Si (100) inks’ array is integrated on SiN/AlGaN/GaN substrate to demonstrate a zero deviation and wafer-scale Si–GaN monolithic integration by transfer printing and self-aligned etching technology. During the heterogeneous integration process, it does not depend on any equipment, such as metal–organic chemical vapor deposition (MOCVD) (epitaxial growth) and wafer bonding machine (wafer bonding) which are costly. The transferred Si and SiN/AlGaN/GaN substrates show an excellent interface morphology. Based on this material system, the monolithic integrated E-mode cascode FETs are demonstrated with good uniformity. The ${I}_{GS}$ is below 10−5 mA/mm within a large gate voltage swing of ±18 V. Threshold voltages of a series of cascode FETs are extracted as 2.2 V (±0.2 V). This novel low-cost technology shows great potential in monolithic heterogeneous integration.

中文翻译:

通过转移印刷和自对准蚀刻技术实现的晶圆级 Si-GaN 单片集成 E-Mode Cascode FET

在本文中,Si (100) 油墨阵列集成在 SiN/AlGaN/GaN 衬底上,通过转移印刷和自对准蚀刻技术展示了零偏差和晶圆级 Si-GaN 单片集成。在异质集成过程中,它不依赖任何设备,如金属有机化学气相沉积(MOCVD)(外延生长)和晶圆键合机(晶圆键合),这些都是昂贵的。转移的 Si 和 SiN/AlGaN/GaN 衬底显示出优异的界面形态。基于该材料系统,单片集成 E 模式共源共栅 FET 具有良好的均匀性。${I}_{GS}$ 在 ±18 V 的大栅极电压摆幅内低于 10−5 mA/mm。一系列共源共栅 FET 的阈值电压提取为 2.2 V (±0.2 V)。
更新日期:2020-08-01
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