Purpose

The emulation of synapses is essential to neuromorphic computing systems. Despite remarkable progress has been made in the two-terminal device (memristor), three-terminal transistors evoke greater attention because of the controlled conductance between the source and drain. The purpose of this paper is to investigate the synaptic plasticity of the TiO₂ nanowire transistor.

Design/methodology/approach

TiO₂ nanowire transistor was assembled by dielectrophoresis, and the synaptic plasticity such as paired-pulse facilitation, learning behaviors and high-pass filter were studied.

Findings

Facilitation index decreases with the increasing pulse interval. A bigger response current is obtained at the pulses with higher amplitude and smaller intervals, which is similar to the consolidated memory at the deeply and frequently learning. The increased current at the higher stimulus frequency demonstrates a promising application in the high-pass filter.

Originality/value

TiO₂ nanowire transistors possess broad application prospects in the future neural network.

中文翻译：

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TiO2纳米线晶体管的突触可塑性

目的

突触的仿真对于神经形态计算系统至关重要。尽管在二端器件（忆阻器）方面已取得了显着进步，但由于源极和漏极之间的电导受控，三端晶体管引起了更多关注。本文的目的是研究TiO ₂纳米线晶体管的突触可塑性。

设计/方法/方法

通过介电电泳组装TiO ₂纳米线晶体管，研究了成对脉冲易化性，学习行为和高通滤波器等突触可塑性。

发现

促进指数随脉冲间隔的增加而降低。在具有较高幅度和较小间隔的脉冲处获得较大的响应电流，这类似于在深度学习和频繁学习时的合并内存。在较高激励频率下增加的电流证明在高通滤波器中有希望的应用。

创意/价值

TiO ₂纳米线晶体管在未来的神经网络中具有广阔的应用前景。