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Machine learning enables design of on-chip integrated silicon T-junctions with footprint of 1.2 μm×1.2μm
Nano Communication Networks ( IF 2.9 ) Pub Date : 2020-07-10 , DOI: 10.1016/j.nancom.2020.100312
Sourangsu Banerji , Apratim Majumder , Alexander Hamrick , Rajesh Menon , Berardi Sensale-Rodriguez

To date, various optimization algorithms have been employed to design and improve the performance of nanophotonic structures. Here, we propose to utilize a machine-learning algorithm viz. binary-Additive Reinforcement Learning Algorithm (b-ARLA) coupled with finite-difference time-domain (FDTD) simulations to design ultra-compact and efficient on-chip integrated nanophotonic 50:50 beam splitters (T-junctions). The T-junctions reported in this paper have a footprint of only 1.2 μm ×1.2μm. To the best of the authors’ knowledge, these designs are amongst the smallest ever reported to date across either simulations or experiments. For all the designs, the simulated net power transmission efficiency is 80%, corresponding to insertion loss < 1 dB, at λ=1.55 μm. We envision that the design methodology, as reported herein, would be useful in general for designing any efficient integrated-photonic device for optical communications systems.



中文翻译:

机器学习可设计占位面积为1.2的片上集成硅T型结 μ×1个2μ

迄今为止,已经采用了各种优化算法来设计和改善纳米光子结构的性能。在这里,我们建议利用机器学习算法viz。二进制加法强化学习算法(b-ARLA)结合有限差分时域(FDTD)模拟,以设计超紧凑且高效的片上集成纳米光子50:50分束器(T型结)。本文报道的T型结仅占1.2个脚印 μ×1个2μ米 就作者所知,这些设计是迄今为止在仿真或实验中报告的最小的设计之一。对于所有设计,模拟净功率传输效率为80%,对应于<1 dB的插入损耗 λ=1个55 μ米 我们设想,如本文所报道的设计方法通常对于设计用于光通信系统的任何有效的集成光子设备将是有用的。

更新日期:2020-07-10
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