In this article, an accurate representation of threshold voltage for double metal double gate (DMDG) device structure has been initiated. It is the lowest gate-source electromotive force at which the device can kick off to conduct. This paper also deliberates a comparison between the high-k medium and SiO₂ as an oxide substance along with that considers the gate stack concept. Use of a promising high-k substance HfO₂, reduces the small channel effect which is generated due to downsizing the device. The main challenge is to overcome the short channel effect that is generated due to scaling down the device. The model has been established by varying several criteria like channel length, film thickness, oxide thickness, temperature change, work function difference and drain source voltage. So that a clear reflection can be seen how the threshold voltage changes with several parameters. For all the cases, the implementations with high-k material show better execution in case of reducing short channel effects (SCEs) that are mainly generated due to reducing the device structure. In this article, the drain induced barrier lowering (DIBL) and subthreshold swing (SS) have also been modelled for the device structure. Extreme conformity can be noticed between the analytical model and TCAD result.

在本文中，已经开始精确表示双金属双栅极（DMDG）器件结构的阈值电压。这是设备可以启动传导的最低栅极-源极电动势。本文还考虑了高k介质与作为氧化物的SiO ₂之间的比较，并考虑了栅堆叠概念。使用有前途的高k物质HfO ₂减小了由于减小设备尺寸而产生的小通道效应。主要挑战在于克服由于缩小器件尺寸而产生的短通道效应。通过改变多个标准（例如沟道长度，膜厚度，氧化物厚度，温度变化，功函数差和漏极源电压）建立了模型。这样就可以清楚地看到阈值电压如何随多个参数变化。对于所有情况，在减少主要由于减小器件结构而产生的短沟道效应（SCE）的情况下，采用高k材料的实现方式显示出更好的执行效果。在本文中，还针对器件结构对漏极引起的势垒降低（DIBL）和亚阈值摆幅（SS）进行了建模。