In this paper, a new population-based evolutionary technique namely symbiotic organisms search (SOS) optimisation algorithm is proposed to optimize the design variables of transistors used in analog circuit. Here length and width of the transistors are considered to be the design variables, the optimisation of which minimizes the input-referred noise, total MOSFET area, and power consumption. This algorithm is quite useful in solving optimization problems but it suffers from higher computational time. Thus in order to minimize the computational time along with SOS algorithm, g_m/I_D design methodology is used. The proposed method not only guarantees appropriate bias conditions but also estimates the reduced search spaces for the design variables of the MOSFETs. To analyse the performance of SOS algorithm along with g_m/I_D design methodology, a low noise differential folded-cascode operational transconductance amplifier has been designed and verified using Cadence Spectre circuit simulator in UMC 0.18 µm CMOS process and MATLAB. From the optimisation results, it is observed that the g_m/I_D method combined with SOS algorithm converges earlier than SOS alone. The total computational time of simulation obtained using the proposed method is 8.59 s while errors found are less than 8%. Hence, this method not only reduces computational time but also improves the accuracy of the circuit design.

本文提出了一种新的基于种群的进化技术，即共生生物搜索（SOS）优化算法，以优化模拟电路中晶体管的设计变量。这里，晶体管的长度和宽度被认为是设计变量，其优化使输入参考噪声，MOSFET总面积和功耗最小化。该算法在解决优化问题中非常有用，但是它需要更长的计算时间。因此，为了最小化与SOS算法一起的计算时间，g _m / _ID使用设计方法。所提出的方法不仅可以保证适当的偏置条件，而且可以估算出MOSFET设计变量所减少的搜索空间。为了分析SOS算法的性能以及g _m / I _D设计方法，设计了一种低噪声差分折叠共源共栅运算跨导放大器，并使用Cadence Specter电路模拟器在UMC 0.18 µm CMOS工艺和MATLAB中进行了验证。从优化结果可以看出，g _m / I _D与SOS算法相结合的方法收敛时间比单独使用SOS早。使用该方法获得的仿真的总计算时间为8.59 s，发现的误差小于8％。因此，该方法不仅减少了计算时间，而且提高了电路设计的准确性。