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A 64-Gb/s PAM-4 Optical Receiver With Amplitude/Phase Correction and Threshold Voltage/Data Level Calibration
IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( IF 2.8 ) Pub Date : 2020-07-01 , DOI: 10.1109/tvlsi.2020.2991721
Kuan-Lin Fu , Shen-Iuan Liu

We present a 64-Gb/s four-level pulse amplitude modulation (PAM-4) optical receiver with the amplitude/phase correction and the threshold voltage/data level calibration, utilizing an inverter-based transimpedance amplifier (TIA). A variable gain amplifier (VGA) with the amplitude/phase correction is also presented. The threshold voltage of the data slicers and the data levels for the error slicers are calibrated. A three-tap decision feedback equalizer is utilized to compensate for the intersymbol interference. The tap coefficients are calibrated by using the sign-sign least-mean-square algorithm. This PAM-4 optical receiver is fabricated in a 40-nm CMOS process. For the TIA with five VGAs, the measured maximum amplitude imbalance is less than 0.4 dB and the phase imbalance is less than ±1°. Its power is 420 mW from a supply of 1.1 V excluding the output buffers. Its core area is 2.2 mm2.

中文翻译:

具有幅度/相位校正和阈值电压/数据电平校准的 64 Gb/s PAM-4 光接收器

我们使用基于逆变器的跨阻放大器 (TIA),展示了具有幅度/相位校正和阈值电压/数据电平校准的 64 Gb/s 四级脉冲幅度调制 (PAM-4) 光接收器。还介绍了具有幅度/相位校正的可变增益放大器 (VGA)。校准数据限幅器的阈值电压和误差限幅器的数据电平。三抽头判决反馈均衡器用于补偿码间干扰。通过使用符号-符号最小均方算法校准抽头系数。此 PAM-4 光接收器采用 40 纳米 CMOS 工艺制造。对于具有五个 VGA 的 TIA,测得的最大幅度不平衡小于 0.4 dB,相位不平衡小于 ±1°。它的功率为 420 mW,电源为 1。1 V,不包括输出缓冲器。其核心面积为 2.2 mm2。
更新日期:2020-07-01
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