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Hardware Obfuscation and Logic Locking: A Tutorial Introduction
IEEE Design & Test ( IF 2 ) Pub Date : 2020-03-30 , DOI: 10.1109/mdat.2020.2984224
Tamzidul Hoque 1 , Rajat Subhra Chakraborty 2 , Swarup Bhunia 3
Affiliation  

If you are designing or integrating hardware IP blocks into your designs, and you are using common global supply chains, then reading this overview article on how to protect your IP against reverse engineering, piracy, and malicious alteration attacks is a must. The authors give a comprehensive overview of current countermeasures that can be used at RTL, gate-, and layout-level to protect your design with a focus on combinational and sequential logic locking and a discussion on merits, overheads, and shortcomings of such techniques. —Jürgen Teich, FAU Erlangen

中文翻译:

硬件混淆和逻辑锁定:教程简介

如果您正在设计硬件IP模块或将其集成到设计中,并且使用的是通用的全球供应链,那么必须阅读有关如何保护IP免受逆向工程,盗版和恶意篡改攻击的概述文章。作者全面介绍了可在RTL,门级和布局级使用的当前对策,以保护您的设计,重点是组合和顺序逻辑锁定,并讨论了这种技术的优缺点,开销和缺点。—Jürgen Teich,FAU Erlangen
更新日期:2020-03-30
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