Carbon nanotube field-effect transistor (CNTFET) based circuit systems have received extensive attention due to their energy-efficiency benefits. However, there is not yet a generally accepted compact SPICE model for CNTFETs compatible with existing electronics design automation platforms. In this paper, the Stanford top gate CNTFET model is optimized through the consideration of different doping levels in source/drain as well as the simplification of an equivalent capacitance network in the intrinsic channel. Based on this, compact models are built for both top gate and wrapped gate CNTFETs. Then the DC properties and the cut-off frequency of top gate and wrapped gate CNTFETs with 15 nm channel length, and their basic logic circuits based on our modelling, are simulated by HSPICE. In the circuit simulation, we add the influence of gate-to-gate capacitance. The influences of structural parameters such as the diameter, number of CNTs and their gap on the current–voltage property,...

中文翻译：

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用于数字电路仿真的碳纳米管FET紧凑模型的修改

基于碳纳米管场效应晶体管（CNTFET）的电路系统因其能效优势而受到广泛关注。但是，尚没有一种与现有电子设计自动化平台兼容的，用于CNTFET的普遍接受的紧凑SPICE模型。在本文中，通过考虑源极/漏极中不同的掺杂水平以及简化本征通道中的等效电容网络来优化斯坦福顶栅CNTFET模型。基于此，为顶栅和包裹栅CNTFET建立了紧凑模型。然后，通过HSPICE对通道长度为15 nm的顶栅和绕栅CNTFET的直流特性和截止频率及其基本逻辑电路进行了仿真。在电路仿真中 我们增加了栅极到栅极电容的影响。结构参数（例如直径，碳纳米管的数量及其间隙）对电流-电压特性的影响，...