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Optimization of double metal-gate InAs/Si heterojunction nanowire TFET
Semiconductor Science and Technology ( IF 1.9 ) Pub Date : 2020-06-21 , DOI: 10.1088/1361-6641/ab8b1f
Yejoo Choi 1 , Yuri Hong 1 , Eunah Ko 2 , Changhwan Shin 1
Affiliation  

The performance of a double metal-gate (DG) InAs/Si heterojunction gate-all-around vertical nanowire tunnel field effect transistor (TFET) is studied using a technology-computer-aided-design tool. Typical drawbacks of the conventional TFET are resolved by taking advantage of using (i) InAs source and (ii) DG structure. The InAs is used as a source material to address the low on-state drive current in the TFET. In addition, a double metal-gate structure is adopted to control the ambipolar current by optimizing the work function of metal gates. Furthermore, the effect of fabrication-induced interface traps at InAs/Si and Si/HfO 2 on device performance is studied. Predictive simulations with various interface traps indicate that a steep subthreshold slope is achieved for D it ##IMG## [http://ej.iop.org/images/0268-1242/35/7/075024/sstab8b1fieqn1.gif] {$ \leqslant $} 10 13 cm −2 eV −1 at the InAs/Si interface. T...

中文翻译:

双金属栅InAs / Si异质结纳米线TFET的优化

使用技术计算机辅助设计工具研究了双金属栅(DG)InAs / Si异质结栅全方位垂直纳米线隧道场效应晶体管(TFET)的性能。通过利用(i)InAs源和(ii)DG结构,可以解决常规TFET的典型缺陷。InAs用作源材料以解决TFET中的低导通状态驱动电流。另外,采用双金属栅结构通过优化金属栅的功函数来控制双极性电流。此外,研究了InAs / Si和Si / HfO 2处制造诱导的界面陷阱对器件性能的影响。具有各种界面陷阱的预测模拟表明,对于D it ## IMG ## [http://ej.iop.org/images/0268-1242/35/7/075024/sstab8b1fieqn1,可以达到一个陡峭的亚阈值斜率。gif] {$ \ leqslant $}在InAs / Si界面处10 13 cm -2 eV -1。T ...
更新日期:2020-06-23
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