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Built-in self-repair structure for real-time fault recovery applications
Microelectronics Reliability ( IF 1.6 ) Pub Date : 2020-08-01 , DOI: 10.1016/j.microrel.2020.113726
Hamed Zandevakili , Ali Mahani

Abstract Recent developments in high-tech industries have led to integrated circuits that are used increasingly in most of the critical applications such as medical supervisory systems and space applications. These systems are facing two major challenges, namely reliability and timing requirements. In other words, these systems have to operate correctly while meeting timing requirements even in the presence of several faults; therefore, they must be protected by real-time fault tolerance techniques to deal with both mentioned challenges. However, most of the existing approaches consider only one of these factors. In this paper, we have proposed a new reconfigurable application-specific integrated circuit (ASIC) structure with real-time fault-tolerance capability which repairs itself in two steps with a minimum delay. It includes some reconfigurable basic cells with self-repair capability which are used to implement the first recovery step. In the second step, the fault recovery process is done by replacing the faulty basic cell using a new reconfigurable routing network. According to the simulation results, our proposed structure can tolerate several permanent faults with minimum delay, power consumption, and area overhead.

中文翻译:

内置自修复结构,适用于实时故障恢复应用

摘要 高科技产业的最新发展导致集成电路越来越多地用于大多数关键应用,例如医疗监控系统和空间应用。这些系统面临两大挑战,即可靠性和时序要求。换句话说,即使存在多个故障,这些系统也必须在满足时序要求的同时正确运行;因此,它们必须受到实时容错技术的保护,以应对上述两个挑战。然而,大多数现有方法仅考虑这些因素之一。在本文中,我们提出了一种具有实时容错能力的新型可重构专用集成电路 (ASIC) 结构,该结构以最小延迟分两步进行自我修复。它包括一些具有自我修复能力的可重构基本单元,用于实现第一个恢复步骤。第二步,通过使用新的可重构路由网络替换故障基本单元来完成故障恢复过程。根据仿真结果,我们提出的结构可以以最小的延迟、功耗和面积开销容忍多个永久性故障。
更新日期:2020-08-01
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