To mitigate the impact of non-deterministic media access latencies in new memory technology devices, a recently proposed Non-Volatile Dual In-line Memory Module (NVDIMM) standard, NVDIMM-P uses novel out-of-order transaction commands. The previous DRAM simulators are unable to support this transaction protocol due to deterministic DDR timing. Also, existing NVDIMM simulators are customized for NAND flash memory, which are not generally applicable to emerging Non-Volatile Memory (NVM). In this letter, we present NMTSim, a transaction-command based and cycle accurate simulator for new memory technology devices. Strictly conforming to NVDIMM-P standard, NMTSim introduces a new memory controller with transaction handling and command issuing capabilities. To enable simulation for emerging NVM using DDR4 standard, we propose some new NVM timing parameters and incorporated them into DRAMSim2. Furthermore, DRAMSim2 is augmented with transaction handling and command scheduling logic to be the backend for the media controller. In addition, NMTSim incorporates an optimized transaction command issuing policy and an early notification mode to optimize access latency. We verify NMTSim using Intel Optane and characterize its performance using synthetic benchmarks with different read / write ratios.

中文翻译：

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NMTSim：用于新存储技术设备的基于事务命令的模拟器

为了减轻新内存技术设备中非确定性媒体访问延迟的影响，最近提出的非易失性双列直插内存模块 (NVDIMM) 标准，NVDIMM-P 使用新颖的无序事务命令。由于确定性 DDR 时序，以前的 DRAM 模拟器无法支持此事务协议。此外，现有的 NVDIMM 模拟器是为 NAND 闪存定制的，通常不适用于新兴的非易失性存储器 (NVM)。在这封信中，我们介绍了 NMTSim，这是一种基于事务命令且周期精确的模拟器，适用于新的存储技术设备。NMTSim 严格遵循 NVDIMM-P 标准，引入了具有事务处理和命令发布功能的新型内存控制器。为了使用 DDR4 标准对新兴 NVM 进行仿真，我们提出了一些新的 NVM 时序参数并将它们合并到 DRAMSim2 中。此外，DRAMSim2 增加了事务处理和命令调度逻辑，作为媒体控制器的后端。此外，NMTSim 结合了优化的事务命令发布策略和早期通知模式来优化访问延迟。我们使用英特尔傲腾验证 NMTSim，并使用具有不同读/写比率的综合基准测试表征其性能。