Feature extraction is an important vision task in many applications like simultaneous localization and mapping (SLAM). In the recent computing systems, FPGA-based acceleration have presented a strong competition to GPU-based acceleration due to its high computation capabilities and lower energy consumption. In this paper, we present a high-level synthesis implementation on a SoC-FPGA of a feature extraction algorithm dedicated for SLAM applications. We choose HOOFR extraction algorithm which provides a robust performance but requires a significant computation on embedded CPU. Our system is dedicated for SLAM applications so that we also integrated bucketing detection method in order to have a homogeneous distribution of keypoints in the image. Moreover, instead of optimizing performance by simplifying the original algorithm as in many other researches, we respected the complexity of HOOFR extractor and have parallelized the processing operations. The design has been validated on an Intel Arria 10 SoC-FPGA with a throughput of 54 fps at \(1226 \times 370\) pixels (handling 1750 features) or 14 fps at \(1920 \times 1080\) pixels (handling 6929 features).

在许多应用程序中，例如同时定位和地图绘制（SLAM），特征提取是一项重要的视觉任务。在最近的计算系统中，基于FPGA的加速由于其强大的计算能力和较低的能耗而与基于GPU的加速形成了激烈的竞争。在本文中，我们介绍了专用于SLAM应用的特征提取算法在SoC-FPGA上的高级综合实现。我们选择HOOFR提取算法，该算法可提供强大的性能，但需要在嵌入式CPU上进行大量计算。我们的系统专用于SLAM应用程序，因此我们还集成了存储桶检测方法，以便在图像中均匀分布关键点。此外，我们没有像其他许多研究中那样通过简化原始算法来优化性能，而是考虑了HOOFR提取器的复杂性，并并行处理过程。该设计已经过Intel Arria 10 SoC-FPGA的验证，吞吐量为54 fps，\（1226 x 370 \）像素（处理1750个特征）或14fps的\（1920 x 1080 \）像素（处理6929个特征）。