Studies on further IC development mutually predict that the reliability of future integrated circuits (ICs) will be severely endangered by the occurrence of electromigration (EM). The reason for the increasing number of EM damages are the ongoing structural reductions in the IC. Digital circuits are particularly at risk because they have been neglected in the consideration of EM, resulting in a lack of suitable EM measures. For this reason, a paradigm shift in physical design must be accomplished, complementing the traditional EM verification step after layout creation with a proactive EM-robust physical synthesis. This work presents the necessary adaptations and new approaches by modifying the routing step of digital circuits, resulting in an EM-robust routing result. Our contribution includes the development of EM models, the derivation of EM-suppressing measures, and finally the consideration of these countermeasures in an EM-robust routing process. In summary, our work is an important contribution to increase the EM robustness in digital layouts, thereby ensuring the reliability of future ICs.

关于IC进一步发展的研究相互预测，电迁移（EM）的出现将严重危害未来集成电路（IC）的可靠性。EM损坏数量增加的原因是IC的结构不断缩小。数字电路特别危险，因为在考虑EM时忽略了它们，导致缺乏合适的EM措施。因此，必须完成物理设计的范式转换，并在布局创建后通过主动的EM健壮的物理综合来补充传统的EM验证步骤。这项工作通过修改数字电路的布线步骤，提出了必要的修改方法和新方法，从而获得了EM鲁棒性的布线结果。我们的贡献包括EM模型的开发，EM抑制措施的推导，最后在EM鲁棒路由过程中考虑这些对策。总而言之，我们的工作为提高数字布局中的EM鲁棒性做出了重要贡献，从而确保了未来IC的可靠性。