This paper presents the investigations of crosstalk effects in ternary logic‐based coupled interconnects. The crosstalk analysis is investigated for coupled copper interconnects and copper‐multilayer graphene (Cu‐MLG) interconnects. In Cu‐MLG interconnects, the Cu interconnect is enclosed with MLG barrier and standard ternary inverter is used to drive the interconnect. Based on the industry standard HSPICE simulation results, the crosstalk effects such as noise peak and delay are lower compared with conventional Cu interconnects. Moreover, the Cu‐MLG interconnects show reduced power dissipation, power delay product (PDP), and energy delay product (EDP) over the Cu interconnects. From the simulation results, it is observed that the Cu‐MLG interconnects provides the performance improvements up to 30.67% compared with the Cu interconnects. Thus, the Cu‐MLG interconnects are more compatible for ternary logic integrated circuits compared with traditional Cu interconnects.

中文翻译：

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三元逻辑应用中具有石墨烯阻挡层的铜上芯片互连的串扰减少

本文介绍了基于三元逻辑的耦合互连中串扰效应的研究。研究了耦合铜互连和铜多层石墨烯（Cu-MLG）互连的串扰分析。在Cu-MLG互连中，Cu互连用MLG势垒封闭，标准三元逆变器用于驱动互连。根据行业标准的HSPICE仿真结果，与传统的Cu互连相比，诸如噪声峰值和延迟之类的串扰效应更低。此外，与铜互连相比，Cu-MLG互连具有更低的功耗，功率延迟积（PDP）和能量延迟积（EDP）。从仿真结果可以看出，与Cu互连相比，Cu-MLG互连的性能提高了30.67％。从而，