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Graph-based STA for asynchronous controllers
Integration ( IF 1.9 ) Pub Date : 2020-06-09 , DOI: 10.1016/j.vlsi.2020.05.005
Stavros Simoglou , Nikolaos Xiromeritis , Christos Sotiriou , Nikolaos Sketopoulos

We present a Graph-based Asynchronous Static Timing Analysis (ASTA) methodology for Asynchronous Control Circuits, which pessimistically computes Critical Cycle(s), instead of Critical Paths, without cycle cutting. Its additional requirement over STA is a graph-based Event Model, Marked Graph or Petri Net. We contrast STA, ASTA results for 23 asynchronous circuit benchmarks, and demonstrate significant timing differences between the ASTA critical cycle and STA critical path, with cut cycles. We also demonstrate our correlation to SPICE level simulations, for 20 of the 23 circuits. Our ASTA flow effectively upper bounds critical cycle delay over SPICE, and is orders of magnitude faster.



中文翻译:

用于异步控制器的基于图的STA

我们介绍了一种用于异步控制电路的基于图的异步静态时序分析(ASTA)方法,该方法悲观地计算了关键周期(而不是关键路径),而无需进行循环切割。它对STA的附加要求是基于图的事件模型,标记图或Petri网。我们对比了23种异步电路基准测试的STA,ASTA结果,并证明了ASTA关键周期和STA关键路径之间具有明显的时序差异(具有截止周期)。我们还展示了23个电路中20个电路与SPICE级仿真的相关性。我们的ASTA流有效地超过了SPICE的临界周期延迟上限,并且快了几个数量级。

更新日期:2020-06-09
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