Compute in-memory (CIM) is a promising technique that minimizes data transport, the primary performance bottleneck and energy cost of most data intensive applications. This has found wide-spread adoption in accelerating neural networks for machine learning applications. Utilizing a crossbar architecture with emerging non-volatile memories (eNVM) such as dense resistive random access memory (RRAM) or phase change random access memory (PCRAM), various forms of neural networks can be implemented to greatly reduce power and increase on chip memory capacity. However, compute in-memory faces its own limitations at both the circuit and the device levels. In this work, we explore the impact of device variation and peripheral circuit design constraints. Furthermore, we propose a new algorithm based on device variance and neural network weight distributions to increase both performance and accuracy for compute-in memory based designs. We demonstrate a 27% power improvement and 23% performance improvement for low and high variance eNVM, while satisfying a programmable threshold for a target error tolerance, which depends on the application.

中文翻译：

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计数卡：利用权重和方差分布实现稳健的内存计算

内存计算 (CIM) 是一种很有前途的技术，可以最大限度地减少数据传输、大多数数据密集型应用程序的主要性能瓶颈和能源成本。这已在加速机器学习应用程序的神经网络中得到广泛采用。利用具有新兴非易失性存储器 (eNVM) 的交叉架构，例如密集电阻随机存取存储器 (RRAM) 或相变随机存取存储器 (PCRAM)，可以实施各种形式的神经网络，以大大降低功耗并增加片上存储器容量。然而，内存计算在电路和设备层面都面临着自身的局限性。在这项工作中，我们探讨了器件变化和外围电路设计约束的影响。此外，我们提出了一种基于设备方差和神经网络权重分布的新算法，以提高基于内存计算的设计的性能和准确性。我们展示了低方差和高方差 eNVM 的 27% 功率改进和 23% 性能改进，同时满足目标容错的可编程阈值，这取决于应用程序。