In this paper, we propose and simulate a novel double gate tunnel field effect transistor (DG-TFET) employing a metallic drain and a gate-drain underlap. The use of a metallic drain and an underlap results in complete ambipolar suppression in the proposed TFET. A 2D calibrated simulation studies have revealed that ambipolar current suppression of ~ 5 orders, without affecting the on-state current of the device, when the gate voltage is varied between 1 V and -1 V, is achieved in the proposed device in comparison to the conventional DG-TFET. The complete ambipolar reduction is attributed to the reduced band-to-band-tunneling (BTBT) rate because of the Schottky barrier formation at the channel/drain interface. Further, the use of gate/drain underlap suppresses the ambipolarity completely in the proposed device in comparison to the conventional one. An ON current (I_ON) and OFF current (I_OFF) ratio (I_ON/I_OFF) of ~ 10¹² with a subthreshold slope (SS) of 63 mV/decade is achieved in the proposed device. Further, the effect of change of various parameters on the performance of the proposed device has been thoroughly studied. It has been observed that the performance can be optimized further by using the optimum value of these parameters. A process flow for the fabrication of the proposed device has also been given.

在本文中，我们提出并模拟了一种采用金属漏极和栅极漏极下重叠的新型双栅极隧道场效应晶体管（DG-TFET）。在建议的TFET中，使用金属漏极和下重叠会导致完全的双极性抑制。二维校准仿真研究表明，与1相比，在所建议的器件中，当栅极电压在1 V和-1 V之间变化时，在不影响器件导通状态电流的情况下，可以抑制〜5个数量级的双极性电流。传统的DG-TFET。由于在沟道/漏极界面处形成了肖特基势垒，所以完全的双极性降低归因于减小的带间隧道传输（BTBT）速率。此外，与常规装置相比，使用栅极/漏极下重叠部完全抑制了所提出的装置中的双极性。在该器件中，亚阈值斜率（SS）为63 mV / decade时，可以实现〜10 ^12的_ON（_开）和OFF电流（I _OFF）之比（I _ON / I _OFF）。此外，已经深入研究了各种参数的改变对所提出的设备的性能的影响。已经观察到，通过使用这些参数的最佳值可以进一步优化性能。还给出了用于制造所提出的装置的工艺流程。