The emergence of Internet of Everything combined with the growing transition of telecom system from traditional wired to wireless technologies have made time-awareness a feature of high priority. One of the key elements in time-awareness applications is time synchronization, which is accomplished by synchronizing the clocks of all nodes. From TDM based network having physical connection for timing signal to connectionless packet-based network, the task of synchronizing clock becomes increasingly complex. To meet this challenge, a call for innovative design on clock circuitry used in the communicating nodes is recently put forward in TAACCS (Time-Aware Applications, Computers, and Communication Systems). In this article, an emerging frequency synthesis technique with features of small frequency granularity and fast frequency switching is suggested as on-chip integrated syntonistor for periodically tuning each nodes' clock frequency, to assist the task of time synchronization. This is a new perspective since it enables the frequency of clock hardware to be tuned continuously for better synchronization quality, not just the value of time register as traditionally done. This is a multidiscipline subject involving network architecture, VLSI circuit design and computer science.

中文翻译：

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使用集成片上同步器进行网络时间同步的新视角：迎接 TAACCS 挑战

万物互联的出现，加上电信系统从传统的有线技术向无线技术的不断转变，使得时间感知成为一个高度优先的特征。时间感知应用的关键要素之一是时间同步，它是通过同步所有节点的时钟来实现的。从具有定时信号物理连接的基于TDM的网络到无连接的基于分组的网络，同步时钟的任务变得越来越复杂。为了应对这一挑战，最近在 TAACCS（时间感知应用、计算机和通信系统）中提出了对通信节点中使用的时钟电路进行创新设计的呼吁。在本文中，一种新兴的频率合成技术，具有频率粒度小和频率切换快的特点，被建议作为片上集成谐振器，用于周期性地调整每个节点的时钟频率，以辅助时间同步任务。这是一个新的视角，因为它使时钟硬件的频率能够连续调整以获得更好的同步质量，而不仅仅是像传统那样只调整时间寄存器的值。这是一门涉及网络架构、VLSI 电路设计和计算机科学的多学科学科。不仅仅是像传统上那样注册时间的值。这是一门涉及网络架构、VLSI 电路设计和计算机科学的多学科学科。不仅仅是像传统上那样注册时间的值。这是一门涉及网络架构、VLSI 电路设计和计算机科学的多学科学科。