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Hardware-efficient imperfection compensation for coherent receiver frontend
Optical Fiber Technology ( IF 2.7 ) Pub Date : 2020-09-01 , DOI: 10.1016/j.yofte.2020.102255
Cheng Ju , Na Liu , Changhong Li , Zaipeng Wang

Abstract Imperfection of coherent receiver frontend can rapidly degrade system performance in coherent optical transmission systems. Those imperfection, including in-phase/quadrature (I/Q) gain and phase imbalance, and voltage mismatch between the output of integrated coherent receiver (ICR) and the full scaling range of analog-to-digital converter (ADC), become increasingly important, especially when high symbol rate, high modulation order, and low roll-off pulse shape are used. A low-complexity, training symbol-free and double feedback structured imperfection compensation algorithm is proposed and experimentally demonstrated online in a field-programmable gate array (FPGA)-based 2.5-GBaud 16QAM transmission hardware platform. The proposed algorithm, relied on the general assumption that I and Q tributaries are statistically independent, would be a useful tool for modulation format independent imperfection compensation. Compared with conventional method, the number of hardened multipliers is reduced by 66.6%, while no extra circuit is required.

中文翻译:

相干接收器前端的硬件高效缺陷补偿

摘要 相干接收机前端的缺陷会迅速降低相干光传输系统的系统性能。这些缺陷,包括同相/正交 (I/Q) 增益和相位不平衡,以及集成相干接收器 (ICR) 的输出与模数转换器 (ADC) 的全标度范围之间的电压不匹配,变得越来越严重重要,尤其是在使用高符号率、高调制阶数和低滚降脉冲形状时。提出了一种低复杂度、无训练符号和双反馈结构的缺陷补偿算法,并在基于现场可编程门阵列 (FPGA) 的 2.5-GBaud 16QAM 传输硬件平台上进行了在线实验演示。所提出的算法依赖于 I 和 Q 支路在统计上独立的一般假设,将是调制格式独立缺陷补偿的有用工具。与传统方法相比,硬化乘法器的数量减少了66.6%,而且不需要额外的电路。
更新日期:2020-09-01
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