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Synthesis of Energy-Efficient Flip-Flop Circuits Based on Sequential-Parallel Structures of MOS Transistors
Russian Microelectronics Pub Date : 2020-03-25 , DOI: 10.1134/s1063739720020067 A. A. Kulakova , E. B. Lukyanenko
中文翻译:
基于MOS晶体管顺序并联结构的节能触发器电路综合
更新日期:2020-03-25
Russian Microelectronics Pub Date : 2020-03-25 , DOI: 10.1134/s1063739720020067 A. A. Kulakova , E. B. Lukyanenko
Abstract
The synthesis of energy-efficient electronic flip-flop circuits based on the application of arrays of p- and n-channel MOS transistors located in the upper and lower half-planes of the circuit is considered. A method is proposed for synthesizing D, RS, and JK flip-flop circuits using a truth table, direct and inverted minterm maps, and expressions describing the transistor arrays. Variants of circuits with and without an output inverter are considered. It is shown that the synthesized circuits have better characteristics and are more efficient than logic element circuits by factors of 2 to 4.中文翻译:
基于MOS晶体管顺序并联结构的节能触发器电路综合