3D integration, i.e., stacking of integrated circuit layers using parallel or sequential processing is gaining rapid industry adoption with the slowdown of Moore's law scaling. 3D stacking promises potential gains in performance, power and cost but the actual magnitude of gains varies depending on end-application, technology choices and design. In this talk, we will discuss some key challenges associated with 3D design and how design-for-3D will require us to break traditional silos of micro-architecture, circuit/physical design and manufacturing technology to work across abstractions to enable the gains promised by 3D technologies.

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堆叠您的筹码：押注 3D 集成以扩大摩尔定律

随着摩尔定律缩放的放缓，3D 集成，即使用并行或顺序处理堆叠集成电路层正在迅速获得行业采用。3D 堆叠有望在性能、功耗和成本方面获得潜在收益，但实际收益的大小因终端应用、技术选择和设计而异。在本次演讲中，我们将讨论与 3D 设计相关的一些关键挑战，以及 3D 设计将如何要求我们打破微架构、电路/物理设计和制造技术的传统孤岛，以跨抽象工作，以实现承诺的收益3D 技术。