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Separation of Lateral Migration Components by Hole During the Short-Term Retention Operation in 3-D NAND Flash Memories
IEEE Transactions on Electron Devices ( IF 3.1 ) Pub Date : 2020-06-01 , DOI: 10.1109/ted.2020.2989734
Shinkeun Kim , Haesoo Kim , Changbeom Woo , Gil-Bok Choi , Moon-Sik Seo , Hyunyoung Shim , Keum Hwan Noh , Hyungcheol Shin

In this brief, we modeled the charge loss in the program verify level 1 (PV1) during the short-term retention operation. As a result, we confirmed that the charge loss in the lateral direction [lateral migration (LM)] was affected by the residual hole at the edge of the target word line (WL). Unlike the other PV levels, LM could be modeled separately in the PV1 by LM caused by electrons (LME) and LM caused by the residual hole (LMH). Also, PV1, which stores a relatively small amount of electrons compared to the other PV levels, was hardly affected by the adjacent cells, so there was almost no difference between solid (S/P) and checker-board (C/P). In order to model the PV1 state, we carried out the modeling considering the four charge loss mechanisms based on the short-term retention data measured at various temperatures (25–115 °C).

中文翻译:

在 3-D NAND 闪存中的短期保留操作期间按孔分离横向迁移组件

在本简报中,我们模拟了短期保留操作期间程序验证级别 1 (PV1) 中的电荷损失。结果,我们确认横向方向的电荷损失[横向迁移 (LM)] 受到目标字线 (WL) 边缘残留空穴的影响。与其他 PV 级别不同,LM 可以在 PV1 中分别由电子 (LME) 引起的 LM 和残余空穴 (LMH) 引起的 LM 建模。此外,与其他 PV 级别相比,PV1 存储的电子量相对较少,几乎不受相邻电池的影响,因此实心 (S/P) 和棋盘格 (C/P) 之间几乎没有区别。为了对 PV1 状态进行建模,我们基于在各种温度(25-115 °C)下测量的短期保留数据,对四种电荷损失机制进行了建模。
更新日期:2020-06-01
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