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Dim Silicon and the Case for Improved DVFS Policies
arXiv - CS - Operating Systems Pub Date : 2020-05-04 , DOI: arxiv-2005.01498
Mathias Gottschlag, Yussuf Khalil, Frank Bellosa

Due to thermal and power supply limits, modern Intel CPUs reduce their frequency when AVX2 and AVX-512 instructions are executed. As the CPUs wait for 670{\mu}s before increasing the frequency again, the performance of some heterogeneous workloads is reduced. In this paper, we describe parallels between this situation and dynamic power management as well as between the policy implemented by these CPUs and fixed-timeout device shutdown policies. We show that the policy implemented by Intel CPUs is not optimal and describe potential better policies. In particular, we present a mechanism to classify applications based on their likeliness to cause frequency reduction. Our approach takes either the resulting classification information or information provided by the application and generates hints for the DVFS policy. We show that faster frequency changes based on these hints are able to improve performance for a web server using the OpenSSL library.

中文翻译:

Dim Silicon 和改进 DVFS 策略的案例

由于散热和电源限制,现代 Intel CPU 在执行 AVX2 和 AVX-512 指令时会降低其频率。由于 CPU 在再次增加频率之前等待 670{\mu} 秒,因此降低了一些异构工作负载的性能。在本文中,我们描述了这种情况与动态电源管理之间的相似之处,以及这些 CPU 实施的策略与固定超时设备关闭策略之间的相似之处。我们表明英特尔 CPU 实施的策略不是最佳的,并描述了潜在的更好的策略。特别是,我们提出了一种根据应用程序导致频率降低的可能性对应用程序进行分类的机制。我们的方法采用生成的分类信息或应用程序提供的信息,并为 DVFS 策略生成提示。
更新日期:2020-05-05
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