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All–MOS self-powered subthreshold voltage reference with enhanced line regulation
AEU - International Journal of Electronics and Communications ( IF 3.2 ) Pub Date : 2020-05-17 , DOI: 10.1016/j.aeue.2020.153245
Hamed Aminzadeh

A nano-watt self-powered voltage reference configuration has been developed for the integrated microsystems in standard CMOS technology. The circuit is highly immune to temperature variations, and can be made very insensitive to the power supply glitches originating from the simple regulation mechanisms used to harvest energy from the environment. The proposed reference is an all-MOS topology without operational amplifier or on-chip resistors, generating a stable output with excellent line regulation owing to the modifications proposed to suppress the line voltage variations. All the MOS devices are working in weak inversion to ensure operation at nano-ampere current levels. Simulated in 0.18-µm standard CMOS process, a prototype of the proposed reference consumes an overall power of 14 nW at 0.7 V minimum supply. The average voltage reference is 255 mV with an average temperature coefficient of 17.05 ppm/°C across −40 °C to +125 °C. The line regulation is 0.00797%/V and 0.00456%/V, respectively, when the reference is subjected to a line voltage of 0.9–2.0 V and 1.0–2.0 V. The power supply rejection ratio is −110 dB, −91 dB and −68 dB for 0.1 Hz, 10 Hz, and 1 MHz at room temperature, respectively.



中文翻译:

具有增强的线路调节功能的全MOS自供电亚阈值电压基准

已经为标准CMOS技术中的集成微系统开发了纳瓦自供电参考电压配置。该电路对温度变化具有高度的抵抗力,并且可以使其对电源故障非常不敏感,电源故障源于用于从环境中收集能量的简单调节机制。所提出的参考是一种不带运算放大器或片上电阻器的全MOS拓扑,由于提出了抑制线电压变化的改进方案,因此可以产生稳定的输出,并具有出色的线调整率。所有MOS器件都处于弱反相状态,以确保在纳安电流水平下运行。在0.18 µm的标准CMOS工艺中进行仿真,所提议参考的原型在0.7 V最小电源下的总功耗为14 nW。在-40°C至+125°C范围内,平均参考电压为255 mV,平均温度系数为17.05 ppm /°C。当基准电压承受0.9–2.0 V和1.0–2.0 V的线电压时,线路调整率分别为0.00797%/ V和0.00456%/ V。电源抑制比为−110 dB,−91 dB和室温下,分别为0.1 Hz,10 Hz和1 MHz时为−68 dB。

更新日期:2020-05-17
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