Using CH₃F/O₂/He based chemistries in high density plasmas for silicon nitride spacer etching, loss of silicon in active source/drain regions of CMOS transistors can be observed. Minimizing the so-called silicon recess during nitride spacer etching is extremely difficult to achieve but mandatory since it directly impacts the device performance. In this work, the authors investigated the benefits of CH₃F/O₂/He/SiCl₄ plasma to limit this recess. Using x-ray photoelectron spectroscopy, the mechanism for high Si₃N₄/Si selectivity is identified as the formation of a preferential thick SiO_xF_yCl_z passivation layer, generated at the silicon surface. The silicon damage is reduced by the growth of this thick layer, limiting the transfer of the reactive layer into the silicon film. These results have been confirmed on pattern structures for fully depleted silicon on insulator 14 nm technology showing the benefit of CH₃F/O₂/He/SiCl₄ etch plasma compared to CH₃F/O₂/He plasma.

中文翻译：

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氮化硅隔离层使用CH3F / O2 / He / SiCl4等离子体选择性蚀刻至硅

使用高密度等离子体中基于CH ₃ F / O ₂ / He的化学物质进行氮化硅间隔物蚀刻，可以观察到CMOS晶体管的有源源极/漏极区域中的硅损失。要最大限度地减少氮化物隔离层蚀刻过程中的所谓硅凹陷非常困难，但必须这样做，因为这会直接影响器件性能。在这项工作中，作者研究了CH ₃ F / O ₂ / He / SiCl ₄等离子体限制这种凹陷的好处。使用X射线光电子能谱，高Si ₃ N ₄ / Si选择性的机理被确定为形成了厚SiO _x F _y Cl _z优先层钝化层，在硅表面产生。通过该厚层的生长减少了硅的损害，从而限制了反应层转移到硅膜中。这些结果已经证实，对图案结构为完全耗尽的绝缘体上硅14纳米技术表示CH益处₃ F /ö ₂ /他/的SiCl ₄蚀刻等离子体相比CH ₃ F /ö ₂ / He等离子体。