This paper presents a calibration method based on capacitor-sorting and capacitor-reconfiguring techniques to improve the Signal-to-Noise-and-Distortion Ratio (SNDR)and Spurious Free Dynamic Range (SFDR) of the successive-approximation-register analog-to-digital converter (SAR ADC). This paper first proposes a circuit for comparing capacitors and currents. Then the circuit that performs bubble sorting of capacitors is realized. By using the calibration method proposed in this work, the mismatch of the capacitors has been greatly decreased, thereby improving the performance of the SAR ADC. The calibration method is verified by simulating a 1 Ms/s 14-bit SAR ADC in 0.18 $\mathrm{\mu }$m technology, the simulation results show that the SFDR is enhanced by about 18 dB and the SNDR is enhanced by about 10 dB, finally, the Figure of Merit (FOM) achieves 26.24 fJ/conv-step.

本文提出了一种基于电容器分选和电容器重新配置技术的校准方法，以提高逐次逼近寄存器模数转换器的信噪比和失真比（SNDR）和无杂散动态范围（SFDR）。 -数字转换器（SAR ADC）。本文首先提出了一种用于比较电容器和电流的电路。然后，实现了对电容器进行气泡分选的电路。通过使用这项工作中提出的校准方法，电容器的失配已大大减少，从而提高了SAR ADC的性能。通过在0.18中模拟1 Ms / s 14位SAR ADC来验证校准方法$\mathrm{\mu }$在技​​术上，仿真结果表明，SFDR增强了约18 dB，SNDR增强了约10 dB，最终，品质因数（FOM）达到26.24 fJ / conv-step。