当前位置: X-MOL 学术Des. Autom. Embed. Syst. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
A model-driven framework for design and verification of embedded systems through SystemVerilog
Design Automation for Embedded Systems ( IF 1.4 ) Pub Date : 2019-11-08 , DOI: 10.1007/s10617-019-09229-y
Muhammad Waseem Anwar , Muhammad Rashid , Farooque Azam , Muhammad Kashif , Wasi Haider Butt

The demands of system complexity and design productivity for embedded systems can be managed by simplifying and reusing the design. Furthermore, these systems should be verified as early as possible in the development process to reduce the cost and effort. The rationale of the proposed framework in this article is to simplify the design and verification process of embedded systems in the context of Model Based System Engineering (MBSE). To achieve this, UML profile for SystemVerilog (UMLSV) is proposed to model the design and verification requirements. Particularly, we introduce various UMLSV stereotypes to model the system design (structure and behavior). Furthermore, a temporal extension of Object Constraint Language is used to capture the verification requirements (properties/constraints) in UMLSV. Consequently, the proposed framework allows the modeling of system design (structure and behavior) along with the verification aspects at higher abstraction level. Following the MBSE process, the high-level models and the verification constraints are transformed into synthesizable SystemVerilog Register Transfer Level and SystemVerilog Assertions code. This leads to perform the Assertions Based Verification of system design in the early development phases by using state-of-the-art simulators. The effectiveness of the proposed framework is demonstrated with the help of multiple case studies including Traffic Lights Controller, Unmanned Aerial Vehicle, Elevator and Car Collision Avoidance System.

中文翻译:

一个模型驱动的框架,用于通过SystemVerilog设计和验证嵌入式系统

可以通过简化和重用设计来管理嵌入式系统的系统复杂性和设计生产率的要求。此外,应在开发过程中尽早验证这些系统,以减少成本和工作量。本文提出的框架的基本原理是在基于模型的系统工程(MBSE)的上下文中简化嵌入式系统的设计和验证过程。为实现此目的,提出了SystemVerilog(UMLSV)的UML概要文件,以对设计和验证要求进行建模。特别是,我们引入了各种UMLSV构造型来对系统设计(结构和行为)进行建模。此外,对象约束语言的时间扩展用于捕获UMLSV中的验证要求(属性/约束)。所以,提出的框架允许对系统设计(结构和行为)以及更高抽象级别的验证方面进行建模。在MBSE过程之后,高级模型和验证约束将转换为可综合的SystemVerilog寄存器传输级别和SystemVerilog断言代码。通过使用最新的模拟器,这可以在早期开发阶段对系统设计进行基于断言的验证。借助包括交通信号灯控制器,无人机,电梯和汽车防撞系统在内的多个案例研究,证明了所提出框架的有效性。高级模型和验证约束将转换为可综合的SystemVerilog寄存器传输级别和SystemVerilog断言代码。通过使用最新的模拟器,这可以在早期开发阶段对系统设计进行基于断言的验证。借助包括交通信号灯控制器,无人机,电梯和汽车防撞系统在内的多个案例研究,证明了所提出框架的有效性。高级模型和验证约束将转换为可综合的SystemVerilog寄存器传输级别和SystemVerilog断言代码。通过使用最新的模拟器,这可以在早期开发阶段对系统设计进行基于断言的验证。借助包括交通信号灯控制器,无人机,电梯和汽车防撞系统在内的多个案例研究,证明了所提出框架的有效性。
更新日期:2019-11-08
down
wechat
bug