We compare the implementation of a 8x8 bit multiplier with two different implementations of a 4x4 quaternary digit multiplier. Interfacing this binary multiplier with quaternary to binary decoders and binary to quaternary encoders leads to a 4x4 multiplier that outperforms the best direct implementation of a 4x4 quaternary multiplier. The far greater complexity of the 1-digit multipliers and 1-digit adders used in this direct implementation compared to the binary 1-bit multipliers and full adders cannot be compensated by the reduced count of quaternary operators. As the best quaternary multiplier includes the corresponding binary one, it means that there is no opportunity to get less interconnects, less chip area, less power dissipation with the quaternary multiplier.

中文翻译：

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比较四元和二元乘法器

我们将 8x8 位乘法器的实现与 4x4 四进制乘法器的两种不同实现进行比较。将此二进制乘法器与四进制到二进制解码器和二进制到四进制编码器连接会导致 4x4 乘法器的性能优于 4x4 四进制乘法器的最佳直接实现。与二进制 1 位乘法器和全加器相比，在这种直接实现中使用的 1 位乘法器和 1 位加法器的复杂度要高得多，但无法通过减少四元运算符的数量来补偿。由于最好的四进制乘法器包括相应的二进制乘法器，这意味着四进制乘法器没有机会获得更少的互连、更小的芯片面积和更低的功耗。