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Spatial systematic mismatch assessment of pre-arranged layout topologies
Solid-State Electronics ( IF 1.7 ) Pub Date : 2020-05-07 , DOI: 10.1016/j.sse.2020.107822
Pavel Vancura , Jiri Jakovenko , Vlastimil Kote , Patrik Vacula , Adam Kubacak

A spatial systematic mismatch, occurring in the integrated circuit manufacturing process, leads to differences in parameters for two or more identical devices. It is widely accepted that placing devices into symmetrical patterns reduces the spatial systematic mismatch between their parameters. In this paper, a novel method based on linear and nonlinear parameter gradient modeling for the assessment of pre-arranged matched structures has been proposed. The direction of a parameter gradient against a layout topology on a wafer is unknown. The pre-arranged layout pattern is rotated against the modeled parameter gradient. In each step of the rotation, for example, with a 1-degree resolution, the mismatch between parameters is calculated. The peak mismatch value is then used for the comparison of the different pre-arranged patterns. The proposed method is independent of technology.



中文翻译:

预先安排的布局拓扑的空间系统失配评估

在集成电路制造过程中发生的空间系统失配会导致两个或多个相同器件的参数差异。众所周知,将设备置​​于对称模式可以减少其参数之间的空间系统失配。本文提出了一种基于线性和非线性参数梯度建模的预匹配结构评估方法。针对晶片上的布局拓扑的参数梯度的方向是未知的。相对于建模的参数坡度旋转预布置的布局图案。在旋转的每个步骤中(例如,以1度分辨率),都会计算出参数之间的不匹配。然后将峰值失配值用于比较不同的预定图案。

更新日期:2020-05-07
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